fdr838p fdr838p, rev. c fdr838p p-channel 2.5v specified powertrench tm mosfet general description these p-channel 2.5v specified mosfets are produced using fairchild semiconductor's advanced powertrench process that has been especially tailored to minimize the on-state resistance and yet maintain low gate charge for superior switching performance. applications ? load switch ? motor driving ? power management march 1999 features ? -8 a, -20 v. r ds( on ) = 0.017 w @ v gs = -4.5 v r ds( on) = 0.024 w @ v gs = -2.5 v ? low gate charge (30nc typical). ? fast switching speed. ? high performance trench technology for extremely low r ds(on) . ? small footprint (38% smaller than a standard so-8); low profile package (1 mm thick); power handling capability similar to so-8. ? 1999 fairchild semiconductor corporation absolute maximum ratings t a = 25c unless otherwise noted symbol parameter ratings units v dss drain-source voltage -20 v v gss gate-source voltage 8v i d drain current - continuous (note 1a) -8 a - pulsed -50 p d power dissipation for single operation (note 1a) 1.8 w (note 1b) 1.0 (note 1c) 0.9 t j , t stg operating and storage junction temperature range -55 to +150 c thermal characteristics r q ja thermal resistance, junction-to-ambient (note 1a) 70 c/w r q jc thermal resistance, junction-to-case (note 1) 20 c/w package outlines and ordering information device marking device reel size tape width quantity . 838p fdr838p 13 12mm 3000 units 1 5 6 7 8 4 3 2 d s d d s d g supersot -8 tm d
fdr838p fdr838p, rev. c electrical characteristics t a = 25c unless otherwise noted s y mbol parameter test conditions min t yp max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = -250 m a-20 v d bv dss d t j breakdown voltage temperature coefficient i d = -250 m a, referenced to 25 c-18mv/ c i dss zero gate voltage drain current v ds = -16 v, v gs = 0 v -1 m a i gssf gate-body leakage current, forward v gs = 8 v, v ds = 0 v 100 na i gssr gate-body leakage current, reverse v gs = -8 v, v ds = 0 v -100 na on characteristics (note 2) v gs(th) gate threshold voltage v ds = v gs , i d = -250 m a -0.4 -0.85 -1.5 v d v gs(th) d t j gate threshold voltage temperature coefficient i d = -250 m a , referenced to 25 c3 mv/ c r ds(on) static drain-source on-resistance v gs = -4.5 v, i d = -8 a v gs = -4.5v, i d = -8 a,t j =125 c v gs = -2.5 v, i d = -7.0 a 0.014 0.020 0.020 0.017 0.026 0.024 w i d(on) on-state drain current v gs = -4.5 v, v ds = -5 v -50 a g fs forward transconductance v ds = -5 v, i d = -8 a 28 s dynamic characteristics c iss input capacitance 3300 pf c oss output capacitance 730 pf c rss reverse transfer capacitance v ds = -10 v, v gs = 0 v, f = 1.0 mhz 350 pf switching characteristics (note 2) t d(on) turn-on delay time 14 25 ns t r turn-on rise time 20 32 ns t d(off) turn-off delay time 110 150 ns t f turn-off fall time v dd = -10 v, i d = -1 a, v gs = -4.5 v, r gen = 6 w 60 90 ns q g total gate charge 30 45 nc q gs gate-source charge 5 nc q gd gate-drain charge v ds = -10 v, i d = -8 a, v gs = - 4.5 v 9nc drain-source diode characteristics and maximum ratings i s maximum continuous drain-source diode forward current -1.5 a v sd drain-source diode forward voltage v gs = 0 v, i s = -1.5 a (note 2) -0.7 -1.2 v 1. r q ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the so lder mounting surface of the drain pins. r q jc is guaranteed by design while r q ca is determined by the user's board design. scale 1 : 1 on letter size paper 2. pulse test: pulse width 300 m s, duty cycle 2.0% a) 70 c/w when mounted on a 1.0 in 2 pad of 2 oz. copper. b) 125 c/w when mounted on a 0.026 in 2 pad of 2oz. copper. c) 135 c/w when mounted on a minimum pad.
fdr838p fdr838p, rev. c typical characteristics figure 1. on-region characteristics. figure 2. on-resistance variation with drain current and gate voltage. figure 3. on-resistance variation with temperature. figure 4: on-resistance variation with gate-to-source voltage. figure 5. transfer characteristics. figure 6. body diode forward voltage variation with source current and temperature. 0 10 20 30 40 50 0 0.6 1.2 1.8 2.4 3 -v ds , drain to source voltage (v) -i d , drain current (a) v gs =-4.5v -3.0v -2.5v -2.0v 0 0.012 0.024 0.036 0.048 0.06 12345 -v gs , gate to source voltage (v) r ds(on) , on resistance (ohm) i d =-4a t j =125 o c 25 o c 0 10 20 30 40 50 0 0.6 1.2 1.8 2.4 3 -v gs , gate to source voltage (v) -i d , drain current (a) v ds =-5v t j =-55 o c 25 o c 125 o c 0.5 1 1.5 2 2.5 0 1020304050 -i d , drain current (a) r ds(on) , normalized drain-source on-resistance v gs =-2.0v -2.5v -3.0v - 3.5v -4.5v 0.001 0.01 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -v sd , body diode voltage (v) -i s , reverse drain current (a) v gs =0 t j =125 o 25 o c -55 o c 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 -50 -25 0 25 50 75 100 125 150 t j , juntion temperatur ( o c) r ds(on) , normalized drain-source on resistance
fdr838p fdr838p, rev. c typical characteristics (continued) figure 7. gate-charge characteristics. figure 8. capacitance characteristics. figure 9. maximum safe operating area figure 10. single pulse maximum power dissipation. figure 11. transient thermal response curve. thermal characterization performed using the conditions described in note 1c. transient themal response will change depending on the circuit board design. 0 1000 2000 3000 4000 5000 0 4 8 12 16 20 -v ds , drain to source voltage (v) capacitance (pf) c iss c oss c rss f=1mhz v gs =0v 0 10 20 30 40 50 0.0001 0.001 0.01 0.1 1 10 100 1000 single pulse time (sec) power (w) single pulse r q ja =135 o c/w t a = 25 o c 0.0001 0.001 0.01 0.1 1 10 100 300 0.01 0.02 0.03 0.05 0.1 0.2 0.3 0.5 1 t , time (sec) transient thermal resistance 1 single pulse d = 0.5 0.1 0.05 0.02 0.01 0.2 duty cycle, d = t / t 1 2 r (t) = r(t) * r r = 135 c/w q ja q ja q ja t - t = p * r (t) q ja a j p(pk) t 1 t 2 r(t), normalized effective 0.01 0.1 1 10 100 0.1 1 10 100 -v ds , drain-source voltage (v) -i d , drain current (a) r ds(on) limit dc 10s 1s 100ms 10ms 1ms 100 m s v gs =-4.5v single pulse r q ja =135 o c/w t a =25 o c 0 1 2 3 4 5 0 8 16 24 32 40 qg, gate charge (nc) -v gs , gate-source voltage (v) i d =-8a v ds =-5v -10v -15v
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